From chip schematic, via collections, chip design, product packaging, simulation and also even more. Discussed by Joren Vaes. Thanks Joren.
Hyperlinks:
– Joren’s Linked In: https://www.linkedin.com/in/joren-vaes-mmwave/
– Apheniox business site: https://www.apheniox.com/
– FEDEVEL programs: https://courses.fedevel.com/
Phases:
00:00 What is this video clip around
00:45 Difference in between analogue and also electronic chip layout
05:49 Schematic of a chip, collections, PDK
09:16 Simulation of a chip
12:16 Software made use of to develop a chip
15:35 Price: How a lot does it set you back to make a custom-made chip
17:12 How to discover chip layout
19:03 Doing design of a chip
22:37 Parasitic removal
24:11 Design policies
28:29 Layers in chip layout
29:47 NMOS/ PMOS transistor
39:58 Package layout for a chip
46:26 Nanometers modern technologies – what does it indicate?
48:17 What is FinFET as well as why it exists?
53:58 How lots of individuals make a chip?
56:36 Joren’s chip
1:02:52 Why to develop ASIC
1:06:39 CMOS vs Bipolar
1:10:47 Making resistors in a chip
1:14:05 Making capacitors in a chip
1:14:49 Thickness of steel layers
1:18:04 Parameters of a transistor
1:22:07 THz chip instance
1:27:29 Making excellent chips from incomplete parts
1:32:56 ESD defense in chips
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Would certainly you such as to sustain me? It’s easy:
It is much valued. Thanks,
– Robert
– Sign up for my Hardware layout and also PCB Layout on-line training courses: https://academy.fedevel.com/
– You can likewise sustain me with Patreon: https://www.patreon.com/robertferanec
– Sign up for on the internet programs held on our system: https://marketplace.fedevel.education/
– Or register for my Udemy training course: https://www.udemy.com/learn-to-design-your-own-boards/
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